Experimental Results of the Effect of Increased Filter Length and Sample Rate of a Feedback Active Noise Control System with the FxLMS-Algorithm implemented in VHDL

Active Noise Control Systems are mostly implemented as feedforward control systems which guarantee a noise reduction without a dependency on the delay in the secondary path. To avoid the need of reference sensors feedback control systems can be used. The most widely used reduction algorithm is the Filtered-x Least Mean Squares (FxLMS), which has the disadvantage of being very sensible to delays in the secondary path. To reduce the delay without reducing the complexity the necessary calculations need to be done in parallel which requires specific hardware architectures. This paper discusses the feedback FxLMS-algorithm implemented in Very High Speed Integrated Circuit Hardware Description Language (VHDL) on a Field Programmable Gate Array (FPGA). Due to its generic design it allows the easy customization of a variety of algorithm parameters. With the current setup a comparison between the implementation on a real-time processor at 2 GHz in its maximum complex representation and its FPGA counterpart is drawn. In a second step the FPGA implementation is tested with increased filter length and sample rate. It shows that the FPGA implementation achieves a significantly higher reduction.